Characteristics and advantages of DSP

Hardware features
(1) DSP belongs to the Modified Harvard architecture, that is, it has two internal buses: data bus and program bus. The program is separated from the data storage space, each has an independent address bus and data bus, and the finger can be taken and read at the same time, which has reached 9 billion floating point operations per second (9000MFLOPS).
(2) Use flow operation. The execution of each instruction is divided into several steps, such as instruction fetching, decoding, fetching, executing, etc., which is completed by several functional units in the chip respectively. It is equivalent to multiple instructions executed in parallel, which greatly improves the computing speed.
(3) Independent hardware multiplier. The multiplication instructions are completed in a single cycle, optimizing a large number of repeated multiplications in algorithms such as convolution, digital filtering, FFT, correlation, matrix operations, etc.
(4) Special instructions such as Circular addressing and bit-reversed greatly improve the addressing, sorting and computation speed in FFT and convolution operations. The 1024-point FFT time is less than 1μs.
(5) Independent DMA bus and controller. There are one or more groups of independent DMA bus, and the CPU program, data bus work in parallel, without affecting the CPU working conditions, DMA speed has reached 800Mbyte/s or more.
(6) Multi-processor interface. Make it easy for multiple processors to work in parallel or in serial to increase processing speed.
(7) JTAG (Joint Test Action Group) standard test interface (IEEE 1149 standard interface). It is convenient for on-line simulation on DSP chip and debugging under multi-DSP condition.
Software feature
(1) Immediate number addressing: the operand is an immediate number, which can be obtained directly from the instruction. For example: MOV A, @0x16; Send the constant 0x16 to register A.
(2) Direct addressing: For example, TI's TMS320 series chip divides the data memory into 512 pages, 128 words per page. Set a Data page Pointer (DP) to point to a data page with a 9-bit pointer and add a 7-bit in-page offset address to form a 16-bit data address. This helps speed up the addressing.
(3) Indirect addressing: ①8 auxiliary registers, by an auxiliary register pointer to specify an auxiliary register arithmetic unit for 16-bit unsigned number operations, determine a new address, load one of the auxiliary registers. The content of the 8 auxiliary registers is quite flexible, and can be loaded, added and subtracted immediately; Can be loaded from the data storage address; Some index addressing can also be done. ③ Due to the use of reverse spurt, reverse order addressing can be realized.
(4) Unique multiplication instructions: Example: MAC X0, Y0, A X: (R0) +, X0 Y: (R4) +N4, YO This instruction commands DSP56300: Multiply the numbers in registers X0 and Y0 and add the result to Acc A, load the value from the key memory address indicated by register R0 into register X0, load the value from the Y memory address indicated by register R4 into the value of register Y0 R0 by 1, and add the value of register N4 to R4.